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perf: SIMD support for ARM - #14

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steve-chavez:arm
Oct 18, 2026
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This uses NEON instructions for ___cpc_find_first_of, the logic is mostly equivalent to the SSE2 one. With the difference that NEON doesn't have a movemask instruction so we use a loop to inspect results.

This uses NEON instructions for ___cpc_find_first_of, the logic is
mostly equivalent to the SSE2 one. With the difference that NEON doesn't
have a movemask instruction so we use a loop to inspect results.
Comment thread cparsec.h
Comment on lines +532 to +537
// Unlike SSE2, NEON has no movemask instruction, so inspect the matching lanes
// after the vector comparisons identify a block containing a stop byte.
uint8_t match_lanes[simd_width];
vst1q_u8(match_lanes, match);
for (size_t lane = 0; lane < simd_width; ++lane)
if (match_lanes[lane] != 0) return i + lane;

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I'm not seeing the same gains in performance as SSE2 on CI results. This may be related to this loop, right now I'm unsure how to optimize it so I'll leave it as TODO.

@steve-chavez
steve-chavez merged commit f4a07ed into PostgREST:master Oct 18, 2026
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